Regular integrated circuit structures, such as field-programmable gate arrays (FPGAs), static random-access memory (SRAM), and other memory and logic devices, typically include a continuous grid of diffusion and gate lines from which logic cells or blocks can then be formed, giving consideration to factors such as the attendant optical lithography design rules and the spacing restrictions imposed thereby. The number of logic cells in such integrated circuit structures has been increasing to, for example, meet the increased performance demands. The increase in the number of logic cells leads to an increase in required area, which can translate to larger chip size requirements and increased costs.